NewChunking Qwen3.5's gated DeltaNet for 1.5x faster prefill on Apple Silicon
Models

Models designed for the chip they ship on.

State-of-the-art models, designed from the ground up for the edge. Co-developed with the compiler and runtime, so they run at full performance on the chips your fleet actually ships.

Find your chip

Most open weights assume a datacenter GPU.

Accurate after INT8

Designed for INT8 from the start. Accuracy holds through quantization and compilation.

Fine-tuned on your fleet

Telemetry from your devices feeds fine-tuning, and the model specializes on the scenes your cameras actually see.

Built with the compiler

Model and compiler are designed together, so the network uses everything the chip has.

From base model to fleet rollout.

1

Start from a Prysm base model

Task-agnostic models we build and train for edge accelerators from the start.

2

Fine-tune on fleet data

Field telemetry supplies the training set, curated from the scenes where the current model struggles.

3

Measure on the actual chip

Every new version reports its accuracy and latency, measured on the chip it will ship to.

4

Roll out over the air

The winner ships through the same tagged, reversible deployment as any other build.

Get a model built for your fleet.

Tell us what your fleet needs to see and we will talk through the model.